Many circuits demand well matched resistors. However, due to process limitations, the attainable matching is often limited. Examples of circuits needing very good matching include but are not limited to Analog to Digital Converters (DAC) and Digital to Analog Converters (ADC). A DAC is a circuit that takes a number of digital bits as input and produces a corresponding analog output. One approach to DAC design is a resistor-string or R-DAC. That circuit topology arranges a number of resistors, or other resistive circuit elements, in series between a high and low reference voltage. An array of switches is controlled by the digital input bits. The switches determine the connection between the resistors, and hence determine the output voltage. The number of resistors depends on the desired resolution—in the simplest conceptual approach for a 16-bit converter, for example, 216−1 or 65,535 resistors are typically needed to provide all possible output levels.
Other approaches to DAC design achieve the same end using a fewer number of resistors. For example, a so-called segmented R-DAC reduces the total number of required resistances by using two or more resistor string segments arranged, at least in part, in parallel. The first segment, controlled by the most significant input bits, provides a course output approximation. The second and subsequent segments are controlled by lesser significant bits and provide finer selection of the output.
Resistor string DACs are a suitable architecture when monotonicity is a major concern. However, this architecture is not practical for high resolution DACs, as the number of resistive elements increases exponentially with the desired resolution. Consequently, segmented R-DAC architectures often strike a good compromise between monotonicity and complexity for higher resolution DACs.
Another approach to providing increased resolution with a decreased number of resistances is the R2R architecture. The R2R architecture principally consists of a repetitive array of resistor arranged in a ladder-like configuration. In an R2R ladder implementation, the resistors in the ladder include a reference resistance value, R, and a resistance value twice that amount, 2R. The R and 2R resistances cause input bits to be weighted in their contribution to the output voltage. This architecture can also achieve high accuracy and low response time. But since R2R ladders also typically require an external buffer to provide low impedance connections, they are less than ideal in certain applications.